Date	: Feb 12th, 2002
		Category	: Processors
		Manufacturer	: AMD
		Author	: Tom Smith

In the beginning of the processor days all of the processors basically performed the same amount of work in a given time. Now is not the same back them . Cyrix was the first to go to a "rating" system. This was supposed to equal the performance of an Intel processor. More often than not that was not the case, back then. With the release of the XP line of processors AMD went back to a performance rating system. Yes Intel has the raw megahertz, but AMD felt that they could do the same amount of work as an Intel processor but at a lower Megahertz. Hence the 1800+ name with the processor today. It means that even though the processor is only clocked at 1.533 GHz it will do the same amount of work as an Intel 1.8 GHz processor. This is where the QuantiSpeed™ Architecture comes in.

QuantiSpeed is :

1. Nine-issue, superscalar, fully pipelined micro-architecture

At the heart of QuantiSpeed Architecture is a nine-issue, superscalar, fully pipelined core. This provides more pathways to feed application instructions into the execution engines of the core, simply allowing the processor to complete more work in a given clock cycle (high IPC). The delicate balance between the depth of the pathways (pipelines) and operating frequency of the processor produces high levels of performance. Longer pipelines alone translate into lower IPC, but high operating frequencies. However, shorter pipelines alone result in increased IPC, but lower operating frequencies. The AMD Athlon XP processor is designed to maintain a balanced approach between pipeline depth and processor frequency to provide extraordinary levels of overall processor performance.

2. Superscalar, fully pipelined Floating Point Unit (FPU)

QuantiSpeed Architecture features a superscalar, fully pipelined FPU, which completes more floating point operations per clock cycle than competitive x86 processors and permits high operating frequencies. The end result is the most powerful x86 FPU available today. The AMD Athlon XP processor has ample computing power to tackle the most computationintensive software applications.

3. Hardware data prefetch

Prefetching instructions from system memory to the processor’s Level 1 Instruction Cache is a common technique used to increase the processor’s work throughput (IPC) and therefore overall performance. This feature of QuantiSpeed Architecture prefetches data from system memory to the processor’s Level 1 Data Cache, which reduces the time it takes to feed the processor critical data, increasing work throughput. As a result, application performance is automatically enhanced when using the AMD Athlon XP processor with QuantiSpeed Architecture.

4. Exclusive and speculative Translation Look-aside Buffers (TLBs)

The TLB structures in QuantiSpeed Architecture keep the maps to critical data close to the processor. This is designed to prevent the processor from stalling or waiting when future data is requested. These TLB structures are now larger, exclusive between caches, and speculative. Larger TLB’s give the AMD Athlon XP processor access to additional data maps. The exclusive nature of these structures removes the duplication of information, freeing- up more space in the Level 2 cache for other useful data to be used by the processor. The aspect of speculation allows the AMD Athlon XP processor to generate future maps of critical data quickly. These three enhancements to the TLB structures further increase the work completed per clock cycle, thus improving real-world application performance of the AMD Athlon XP processor.

As a result of QuantiSpeed Architecture, the AMD Athlon XP processor has an optimum balance of IPC and frequency to achieve high levels of real world PC application performance.

	Print this article	3DNow! Professional Table of Contents Preamble What's New 3DNow! Professional Test Setup SiSoft Sandra 3DMark 2000 3DMark 2001 Quake III & Unreal Tournament Conclusion
	E-mail this article
	Discuss this article